The AI Infrastructure Stack
Overview  /  Tier V Silicon
Layer 14

Semiconductor Equipment (Semicap)

The toolmakers. Every fab on earth runs on this gear.

What this layer does

A modern fab has hundreds of tool types performing dozens of process steps to build a chip layer by layer. The semicap industry that sells those tools is a beautiful oligopoly: five companies (ASML, Applied Materials, Lam Research, Tokyo Electron, KLA) own >70% of the market, each with deeply entrenched positions in their step of the process. ASML has a literal monopoly on EUV lithography.

Semicap is the most cyclical layer in the silicon column — capex booms then busts — but with AI demand driving leading-edge capacity adds and CHIPS-Act-style geographic redundancy build-outs, this cycle has unusually high duration.

Sub-categories

14.1
EUV Lithography

The single most complex industrial product humans make. Required for every chip below 7nm. ASML is the only supplier on earth.

14.2
DUV Lithography (193nm immersion + older)

Trailing-edge and back-end-of-line lithography. ASML dominant but Nikon/Canon serve mature nodes.

14.3
E-Beam Lithography & Mask Writing

Used for photomask writing and some specialty patterning. Quiet but high-margin.

14.4
Deposition (CVD / ALD / PVD / Epi)

Putting thin films of material onto the wafer. Largest semicap category by dollars after litho.

14.5
Etch

Selectively removing material to define structures. Critical for 3D NAND and gate-all-around transistors.

14.6
CMP — Chemical Mechanical Planarization

Polishing wafers flat between steps. Applied Materials and Ebara are the two real players.

14.7
Ion Implant

Implanting dopant atoms into silicon. Smaller niche; Applied Materials and Axcelis split most of it.

14.8
Thermal / Diffusion / Rapid Thermal Processing

Furnaces, anneal, oxidation. Mature but essential.

14.9
Wet Clean & Surface Prep

Wafer cleaning between steps. SCREEN dominates; consolidating market.

14.10
Metrology & Inspection

Measuring and inspecting wafers in-line. KLA owns the high-end. Critical-margin segment because yield depends on it.

14.11
ATE — Automated Test Equipment

Testing finished die. AI accelerators are driving Advantest test-time per chip up sharply.

14.12
Probe Cards & Sockets

The physical interface to a die under test. Replaced often; consumable-like revenue.

14.13
Fab Sub-Systems & Components

Suppliers to the suppliers — mass flow controllers, pumps, RF generators, gas panels. The unsung public-market workhorses.

Analysis coming soon — will cover: ASML High-NA EUV ramp, China export controls, the five-name oligopoly competitive moats, hybrid bonding tool TAM (split with Layer 13), and which fab sub-system names are under-followed.