The AI Infrastructure Stack
Overview  /  Tier V Silicon
Layer 12

Fabrication (Foundries)

Where designs become physical chips. The single highest-capex industry in the world.

What this layer does

A leading-edge fab is a $20–30B factory operating at the absolute limit of human engineering. Three companies can fabricate at the 3nm / 2nm node today — and effectively only one (TSMC) can do it at scale, yield, and on schedule. Every Nvidia GPU, every Google TPU, every AWS Trainium chip is fabricated there. This is the most strategically important industrial cluster on earth.

Below the leading edge, mature foundries (GlobalFoundries, UMC, Tower) make the analog, power, and RF chips that surround every accelerator. Memory makers (Samsung, SK Hynix, Micron) operate their own integrated fabs — both designers and manufacturers.

Sub-categories

Analysis coming soon — will cover: TSMC’s pricing power and 2nm ramp, CoWoS gating dynamics (it’s a packaging issue, not a fab issue — see Layer 13), Intel Foundry as a strategic option, geopolitics (Taiwan risk, CHIPS Act capacity), memory cycle vs. AI demand.